Field of the Invention
The present invention relates to a paste and a method for manufacturing a solar cell using the same, and in particular, to a paste for forming an etching mask pattern, which is capable of forming a selective emitter layer more stably, and a method for manufacturing a solar cell using the same.
Description of the Related Art
Recently, it is expected that conventional energy sources such as oil or charcoal will be exhausted, and thus interests in alternative energy are increasing. Among alternative energy, a solar cell has abundant energy sources and does not cause environmental pollution, and thus it becomes the object of attention.
The solar cell is classified into a solar heat cell that produces vapor required to run a turbine using solar heat, and a solar light cell that converts photons into electrical energy using properties of a semiconductor. Generally, the solar light cell is represented as a solar cell.
The solar cell largely includes a silicon solar cell, a compound semiconductor solar cell and a tandem solar cell according to raw material. Among them, the silicon solar cell leads the solar cell market.
FIG. 1 is a cross-sectional view illustrating a basic structure of a silicon solar cell. Referring to FIG. 1, the silicon solar cell includes a substrate 101 of a p-type silicon semiconductor, and an emitter layer 102 of an n-type silicon semiconductor. A p-n junction is formed at an interface between the substrate 101 and the emitter layer 102 in the similar way to a diode.
When light falls on a solar cell of the above-mentioned structure, electrons and electron holes create in a silicon semiconductor doped with an impurity by the photovoltaic effect. Specifically, electrons create in the emitter layer 102 of an n-type silicon semiconductor as a plurality of carriers, and electron holes create in the substrate 101 of a p-type silicon semiconductor as a plurality of carriers. The electrons and electron holes created by the photovoltaic effect are drawn toward the n-type silicon semiconductor and p-type silicon semiconductor, and move to a front electrode 103 on the emitter layer 102 and a rear electrode 104 below the substrate 101, respectively. Then, when the front electrode 103 and the rear electrode 104 are connected to each other, electrical current flows.
The output characteristics of the solar cell are evaluated using an output current-voltage curve of the solar cell. On the output current-voltage curve, a point where a value Ip×Vp obtained by multiplying an output current Ip by an output voltage Vp is maximum, is defined as a maximum output Pm, and a value obtained by dividing the maximum output Pm by the total light energy incident on the solar cell (S×I: S is the area of device, I is the intensity of light irradiated on a solar cell) is defined as a conversion efficiency η. To improve the conversion efficiency η, it needs to increase a short-circuit current Isc (an output current when V=0 on the output current-voltage curve) or an open-circuit voltage Voc (an output voltage when I=0 on the output current-voltage curve) or to increase a fill factor that measures the squareness of the output current-voltage curve. As the fill factor approaches 1, the output current-voltage curve gets close to an ideal squareness and the conversion efficiency η increases.
Among the above-mentioned three factors for determining the conversion efficiency of the solar cell, an open-circuit voltage behavior is closely related with a doping concentration of an n-type impurity when an emitter layer is formed by diffusing the n-type impurity into the surface of a substrate of a p-type silicon semiconductor. For reference, a doping profile of the n-type impurity shows that a doping concentration is highest at the surface of an emitter layer and decreases toward the substrate according to a Gaussian distribution or an Error function.
Conventionally, there is a tendency to excessively dope an emitter layer with an impurity to increase an open-circuit voltage of a solar cell. In this case, an uppermost portion (hereinafter referred to as a dead layer) of the emitter layer has higher doping concentration of an n-type impurity than the solubility of a solid in a silicon semiconductor. For reference, the dead layer has a thickness of about 50 to 200 nm. As a result, mobility of carriers decreases near the surface of the emitter layer, a recombination rate of the carriers increases by influence of scattering of excess impurities, and life of the carriers reduces.
To solve the problems, an emitter etch-back process has been suggested. The emitter etch-back process is performed after an emitter layer is formed through a diffusion process under the conditions of excessive doping with an impurity, and removes a dead layer affecting adversely the performance of a solar cell by wet etching using a mixture of nitric acid and hydrofluoric acid or CF4 plasma etching.
However, the mixture of nitric acid and hydrofluoric acid or CF4 plasma has disadvantages of poor etching selectivity and high etching rate for an area doped excessively with an n-type impurity. Thus, the conventional emitter etch-back process has low process reproducibility and stability in selectively removing only a portion of an emitter layer doped excessively with an n-type impurity.
Under this situation, to ensure process reproducibility and stability of the emitter etch-back process, conventionally overetching was performed, that is, even a portion of an area doped suitably with an n-type impurity was etched, as well as on an area doped excessively with an n-type impurity. However, if an emitter layer is overetched, there is a deterioration in contact characteristics of a front electrode connected with the emitter layer due to a low impurity concentration of the surface of the emitter layer. As a result, contact resistance between the front electrode and the emitter layer increases, and accordingly, the fill factor of a solar cell decreases. And, the decrease in fill factor of a solar cell causes reduction in conversion efficiency of the solar cell.
Meanwhile, a selective emitter process has been introduced to overcome the drawbacks of the emitter etch-back process. The selective emitter process is performed after the emitter etch-back process, and forms a mask pattern exposing only an area where a front electrode is to be formed, and diffuses an n-type impurity into a portion of the emitter layer exposed through the mask pattern, so that an emitter layer doped with a high concentration of n-type impurity is formed only at an area where a front electrode is to be formed. However, the selective emitter process needs photolithography and an additional impurity diffusion process to form a mask pattern, and accordingly, it has drawbacks of complicated manufacturing process and increased manufacturing cost of a solar cell.